Key Highlights

Configuration 2 DUT per chassis
Operation Modes Manual loading / unloading. Parallel testing
Control Software TigerClaw software installed on external Control PC with Windows 10 Professional
Number of Test Sockets 2x 288-pin ZIF test sockets per chassis ( Each ‘Test Site’ corresponds to one DIMM test socket)
Memory Type Supported DDR5 SDRAM 8/16 Gb density, x8/16 width
DIMM Standards Supported DDR5 ECC and non-ECC Un-buffered DIMM
DIMM capacity 32GB max.
ECC 1R x8 / 1R x16; Non-ECC 1R x8 / 2R x8 / 1R x16
Test Frequency (Std) Clock 2000 / 2200 / 2400 / 2600 / 2800 MHz
Optional feature per MHz fine adjustment
OC Support Over-clock memory frequency up to 4000MHz (DDR8000)
*Actual OC capability depends on DIMM performance and VDD/VDDQ settings
I/O Interface DDR5 CK/CA/DQ/DQS/DM POD 1.1V
DDR5 RESETn CMOS 1.1V
SPD I2C CMOS 3.3V, open-drain
PMIC PWR_GOOD POD 1.1V
Temperature Control Chamber Optional heat chamber with integrated test plan flow control
Heat chamber temperature 85C max, +/-3C overall accuracy
Refer to Heat Chamber specifications for details

 
 

 
 

Technical Specifications

Address Generation 17X + 10Y + 2BA + 3BG
# of Rank Supported 2-rank
Data lines 2-set 32/36bits
Control Lines 2-set CA/CSn/PAR set, 1-set ALERTn/RESETn
DUT Clocks 2 pair differential
Device Access Parameters tCL, tCWL, tRCDtRP, tRASmin, tREFI, tFAW, tRFC, tRFC2, tRFCsb, tRRD_L, tRRD_S, tRTP, tWR, tWTR_L, tWTR_S, tCCD_L, CmdRate
Adjustable in nCLKs
Refresh Control Per row Refresh time adjustable from 1us up to 32768 memory clock periods
DUT Power VIN_BULK 5V nominal; adjustable +/-20%, 10mV step, 5A max
Each DIMM is individually powered to optimize performance
Over-current protection
VBULK Current Measurement Normal mode – 0~5A, resolution 0.1mA, accuracy +/-(2% + 0.1mA)
Precision mode – 0 -50mA, resolution 20uA, accuracy +/-(2% + 20uA)
On-DIMM PMIC Control – Adjustable PMIC generated VDD/VDDQ/VPP
– Obtain current readings for VDD/VDDQ/VPP rails
Specifications of these controls according to JEDEC Doc JESD301-2
Tests Available Functional  –  Row Hammer, MarchA, MarchX, MarchC, MarchG, MATS, and many more industry standard tests.
Application  –  ATSLWB, JumpLWB, Shift, MoveRot, MT64
Others  –  Rank Margin test, SPD test, IDDx
SPD Operations SPD Read, Write, Serialization, Import, Export, Address Check, Check Sum, Auto Setup , Program, Compare, Program Exclude, Compare Exclude, Hex View, Symbolic View
I2C Operations I2C access to on-DIMM hub and devices such as PMIC, TS
Error Logging Individual 64/72 DQ failures indicator
Record last fail physical address (17X / 10Y / 2BA / 3BG) per rank
Other Features Shmoo and Burn-in tools
Comprehensive test flow control and binning control
Speed Grading and Sorting support
Test and Results Data logging capability
Optional Features PPR (Post Package Repair) Support
Device Core parameter Profiler
DQ Eye Diagram

 
 

 
 

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** KingTiger Technology, Inc. (KTI) reserves the right to change specifications, product descriptions, product quality, pricing, model applications and/or the information on this Web Site at any time without prior written or oral notice and without further obligation. Because some of this information may be updated at any time but not incorporated into the Web Site until later, please check with the KTI representatives for complete details.